Abstract
In this paper, we propose the design and implementation mechanism for a digital amplitude modulator based on the use of Direct Digital Frequency Synthesizer (DDFS) using Cyclone II EP2C20F484C7 FPGA from ALTERA placed on education and development board DE-1 . The proposed modulator has the following parameters:
-Clock frequency : FCLK=50MHz .
-Modulation type of signal is : AM with carrier , AM without carrier.
-The modulating signal is sinusoidal of frequency 10 KHz.
-Modulation factor (m= 0 to 100).
-Carrier type: with carrier, without carrier.
-The ROM capacity for the stored signal samples 8192X8 bits, and their values are positive within the range from 0 to 255.
-Frequency range : (3 Hz…10 MHz) .
-Frequency Resolution : (3 Hz) .
- Signal amplitude (5V) .
- Digital designs allow the slides to modify and design development for results and better through reprogramming, depending on the user's desire.

Keywords: Digital Amplitude Modulator , AM, DDFS , FPGA.

| DOI: 10.17148/IMRJR.2025.020101