Abstract:
In this paper, the direct digital frequency synthesizer (DDFS) and Quadrature direct digital frequency synthesizer (QDDFS) specifications were improved by increasing the number of accumulator bits, increasing the memory capacity of the generated signal samples, using a digital analog convertor (DAC) by increasing the number of its bits, as well as generating different types of analogue signals in a digital way.
Also, we discuss a practical mechanism of a Quadrature direct digital frequency synthesizer (QDDFS) based on a direct digital frequency synthesizer (DDFS) using Cyclone II EP2C20F484C7 FPGA from ALTERA placed on education and development board DE-1 with the following parameters:
-Output waveforms: sin, cos.
-Frequency range: (3Hz…..10000 KHz ).
-Frequency Resolution (3Hz).
-Signal amplitude (5V).
-With Reset of the generator.
-Frequency of the generated signal for all types (1MHz).

Keywords: DDFS, QDDFS, FPGA, DAC.

| DOI: 10.17148/IMRJR.2025.020702